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ADT7467
Table 67. THERM TEMPERATURE LIMIT REGISTERS (Note 1)
Register Address
0x6A
0x6B
0x6C
R/W (Note 2)
Read/Write
Read/Write
Read/Write
Description
Remote 1 THERM Temperature Limit
Local THERM Temperature Limit
Remote 2 THERM Temperature Limit
Power-On Default
0xA4 (100 ? C)
0xA4 (100 ? C)
0xA4 (100 ? C)
1. If any temperature measured exceeds its THERM limit, all PWM outputs drive their fans at 100% duty cycle. This is a fail-safe mechanism
incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the event that s oftware
or hardware locks up. If set to 0x80, this feature is disabled. The PWM output remains at 100% until the temperature drops below THERM
limit – hysteresis. If the THERM pin is programmed as an output, exceeding these limits by 0.25 ? C can cause the THERM pin to assert low
as an output.
2. These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to
these registers fail.
Table 68. TEMPERATURE/T MIN HYSTERESIS REGISTERS (Note 1)
Register Address
0x6D
0x6E
R/W (Note 2)
Read/Write
Read/Write
Description
Remote 1 and Local Temperature Hysteresis
Remote 2 Temperature Hysteresis
Power-On Default
0x44
0x40
1. Each 4-bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperature for that
channel falls below its T MIN value, the fan remains running at PWM MIN duty cycle until the temperature = T MIN – hysteresis. Up to 15 ? C of
hysteresis can be assigned to any temperature channel. The hysteresis value chosen also applies to that temperature channel if its THERM
limit is exceeded. If the THERM limit is exceeded, the PWM output being controlled goes to 100% and remains at 100% until the temperature
drops below THERM – hysteresis. For acoustic reasons, it is recommended that the hysteresis value not be programmed to less than 4 ? C.
Setting the hysteresis value lower than 4 ? C causes the fan to switch on and off regularly when the temperature is close to T MIN .
2. These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to
these registers fail.
Table 69. REGISTER 0X6D ? REMOTE 1 AND LOCAL TEMPERATURE HYSTERESIS
Bit
<3:0>
<7:4>
Name
HYSL
HYSR1
R/W (Note 1)
Read/Write
Read/Write
Description
Local temperature hysteresis. 0 ? C to 15 ? C of hysteresis can be applied to the local
temperature AFC and dynamic T MIN control loops.
Remote 1 temperature hysteresis. 0 ? C to 15 ? C of hysteresis can be applied to the Remote 1
temperature AFC and dynamic T MIN control loops.
1. This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this
register fail.
Table 70. REGISTER 0X6E ? REMOTE 2 TEMPERATURE HYSTERESIS
Bit
<7:4>
Name
HYSR2
R/W (Note 1)
Read/Write
Description
Local temperature hysteresis. 0 ? C to 15 ? C of hysteresis can be applied to the local
temperature AFC and dynamic T MIN control loops.
1. This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this
register fail.
Table 71. REGISTER 0X6F ? XNOR TREE TEST ENABLE (POWER-ON DEFAULT = 0X00)
Bit
<0>
<7:1>
Name
XEN
Reserved
R/W (Note 1)
Read/Write
Read Only
Description
If the XEN bit is set to 1, the device enters the XNOR tree test mode. Clearing the bit
removes the device from the XNOR tree test mode.
Unused. Do not write to these bits.
1. This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this
register fail.
Table 72. REGISTER 0X70 ? REMOTE 1 TEMPERATURE OFFSET (POWER-ON DEFAULT = 0X00)
Bit
<7:0>
R/W (Note 1)
Read/write
Description
Allows a twos complement offset value to be automatically added to or subtracted from the Remote 1
temperature reading. This is to compensate for any inherent system offsets such as PCB trace resistance.
LSB value = 0.5 ? C.
1. This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this
register fail.
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